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FPGA prototype verification platform for digital micromirror device driving chip

A digital micromirror device and driver chip technology, applied in electrical components, picture copiers, color TV components, etc., can solve the problems of DLP technology development limitations and other problems, achieve compatibility and pioneering, easy to carry, interface perfect effect

Active Publication Date: 2020-09-25
EAST CHINA NORMAL UNIVERSITY
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  • Abstract
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  • Application Information

AI Technical Summary

Problems solved by technology

The data shows that digital light processing technology (DLP) accounts for more than 90% of the total projection technology, and digital micromirror device (DMD), as the core of DLP technology, has been exclusively monopolized by a certain company. Therefore, the development of DLP technology in China has always been restricted

Method used

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  • FPGA prototype verification platform for digital micromirror device driving chip
  • FPGA prototype verification platform for digital micromirror device driving chip
  • FPGA prototype verification platform for digital micromirror device driving chip

Examples

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Embodiment

[0045] refer to Figure 10 , this platform can constitute an intelligent projection platform, the HDMI video input and output module 16 in the ZYNQ subsystem 1 realizes video input and DMD drive, the Kintex chip 21 in the Kintex subsystem 2 receives data through the camera 6, and then solidifies it in the Kintex chip 21 The advanced neural network algorithm completes functions such as gesture recognition and scene detection. For everyday projection equipment, the neural network unit solidified in the Kintex chip 21 can recognize user gestures and complete human-computer interaction. At the same time, the scene detection module solidified in the Kintex chip 21 can adjust the color saturation, brightness, sharpness and intelligent noise reduction for the corresponding scene, so as to improve the overall visual quality.

[0046] Specific working process: the video to be projected is input from the HDMI interface 161 of the HDMI video input and output module in the ZYNQ subsystem...

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PUM

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Abstract

The invention discloses an FPGA prototype verification platform for a digital micromirror device driving chip. The platform comprises an FPGA programmable gate array ZYNQ subsystem, an FPGA programmable gate array Kintex subsystem, a capacitive touch screen, a daughter board part, a power supply part, a camera, a color wheel module, a UHP lamp module and a high-power LED module. High requirementsof chip verification can be met, and moreover, the platform is suitable for intelligent development of the projection market. According to the invention, self-adaptive dynamic expansion of hardware resources can be realized, and the platform can be applied to various occasions such as super-large-scale chip prototype verification, intelligent projection chip prototype verification, remote networkvideo projection chip prototype verification and the like. The platform has the advantages of being small in size, complete in function, excellent in performance, high in developability and the like,and easy, convenient and rapid use experience is brought to users.

Description

technical field [0001] The present invention relates to chip prototype verification, in particular to a digital micromirror device drive chip FPGA prototype verification platform, which as a projection chip prototype verification platform includes ultra-large-scale chip prototype verification, intelligent projection chip prototype verification, and remote network video projection chip Prototype verification, etc. Background technique [0002] With the continuous development of integrated circuits, the demand for chip verification continues to increase. At present, the time spent in the chip verification stage accounts for more than 60% of the entire chip design cycle, so how to improve the efficiency and comprehensiveness of verification is a major problem facing current chip design. Traditional EDA simulation is a commonly used verification method at present, but it has the disadvantages of slow verification speed and incomplete verification. [0003] At the same time, wi...

Claims

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Application Information

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IPC IPC(8): H04N9/31
CPCH04N9/3141H04N9/3179
Inventor 周家辉高源倪瑶刘一清
Owner EAST CHINA NORMAL UNIVERSITY
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