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Low-power coding method and low-power coding device

A low-power, coding technology, applied in the field of communication, can solve the problems of small coding gap and limited power consumption of the encoder, and achieve the effect of reducing coding power consumption

Active Publication Date: 2014-12-24
HISILICON (SHANGHAI) TECH CO LTD
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  • Summary
  • Abstract
  • Description
  • Claims
  • Application Information

AI Technical Summary

Problems solved by technology

[0004] Since the gating clock can only save the power consumption of the encoder in the encoding gap, if the encoder is encoding in the full-speed operation mode, the encoding gap of the encoder is small, and the power consumption saved by using the gating clock is limited

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Embodiment Construction

[0052] figure 1 It is a flowchart of a low-power encoding method provided by an embodiment of the present invention. figure 2 The coding system structure diagram provided for the embodiment of the present invention. The embodiment of the present invention adopts figure 2 The encoding system shown provides a low-power encoding method. The encoding system includes an encoding pre-analysis device, a master encoder and a slave encoder. Both the master encoder and the slave encoder are used to implement video encoding. The difference is that the master encoder It is an encoder with strong compression ability, small loss of processing image information, and high power consumption, while the slave encoder is an encoder with weak compression ability, large loss of image information processing, and low power consumption. The function of the encoding pre-analysis device It is to select the main encoder or the slave encoder as the current encoder, and the specific steps for low-power...

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Abstract

An embodiment of the invention provides a low-power coding method and a low-power coding device. The low-power coding method includes receiving the quantities of skip macro blocks and the quantities of macro blocks with motion vectors MV which are default values; acquiring coding complexity indexes according to the quantities of the skip macro blocks and the quantities of the macro blocks with the motion vectors MV which are the default values, and judging scene types corresponding to target frames; utilizing slave coders as target coders if the quantities of first preset scenes in the scene types respectively corresponding to the multiple continuous target frames are larger than threshold values, and starting the slave coders for coding. The skip macro blocks correspond to the target frames transmitted by original target coders. The low-power coding method and the low-power coding device in the embodiment of the invention have the advantages that the slave coders are used as the target coders to code follow-up target frames, power consumed by the slave coders is lower than power consumed by main coders, the target frames corresponding to the simple motion scenes are coded by the slave coders instead of the main coders, and accordingly coding power can be effectively reduced as compared with a mode in which all target frames are coded by the aid of main coders.

Description

technical field [0001] Embodiments of the present invention relate to communication technologies, and in particular to a low-power encoding method and device. Background technique [0002] Compared with the H.264 video protocol, the encoding complexity of the latest H.265 video protocol has increased by 8-10 times, resulting in a linear increase in the power consumption of the H.265 encoder. [0003] In the prior art, the problem of high power consumption of the H.265 encoder is solved by using a gated clock. Among them, the gated clock is specifically divided into a frame-level gated clock and a module-level gated clock. The frame-level gated clock means that the encoder turns on all internal clocks during the encoding process. All clocks include the register configuration clock and are turned off after encoding. All clocks except the register configuration clock are used to reduce power consumption; the module-level gated clock means that when the internal sub-module of t...

Claims

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Application Information

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Patent Type & Authority Applications(China)
IPC IPC(8): H04N19/513H04N19/57
CPCH04N19/513H04N19/132H04N19/105H04N19/139H04N19/14H04N19/156H04N19/172H04N19/176H04N19/52
Inventor 李明
Owner HISILICON (SHANGHAI) TECH CO LTD
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