CPCI bus-based rotary strapdown system hardware platform and navigation calculation method therefor
A hardware platform, a technology for navigation and calculation, applied in navigation calculation tools and other directions, can solve the problems of low calculation frequency and poor anti-interference ability, and achieve the effect of high acquisition rate, enhanced anti-interference ability, and compact structure
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specific Embodiment approach 1
[0031] Specific implementation mode one: combine figure 1 with figure 2 Describe this embodiment, the rotary strapdown system hardware platform based on CPCI bus described in this embodiment,
[0032] It includes fiber optic gyroscope signal and accelerometer signal acquisition module 1, signal fusion expansion board 2 and navigation calculation module 3;
[0033] Described signal fusion expansion board 2 comprises FPGA circuit 2-1, CPCI bridge chip 2-2 and CPCI bus interface circuit 2-9,
[0034] Optical fiber gyro signal and accelerometer signal acquisition module 1, used for collecting three-way gyro signals and three-way accelerometer signals, and sending the collected three-way gyro signals and three-way accelerometer signals to FPGA circuit 2-1;
[0035] The CPCI bridge chip 2-2 is used to realize the data exchange between the FPGA circuit 2-1 and the navigation solution module 3;
[0036] The CPCI bus interface circuit 2-9 is used to realize the conversion of the th...
specific Embodiment approach 2
[0046] Specific implementation mode two: combination figure 2 Describe this embodiment, this embodiment is the further limitation of the rotary strapdown system hardware platform based on CPCI bus described in specific embodiment one,
[0047] The signal fusion expansion board 2 also includes UART12-6, UART22-7, SDRAM2-3, configuration chip 2-4 and EEPROM2-5;
[0048] UART12-6 is used to realize the data communication between the FPGA circuit 2-1 and the rotary mechanism of the rotary strapdown system;
[0049] UART22-7, used to realize data communication between FPGA circuit 2-1 and GPS and DVL circuit of rotary strapdown system;
[0050] SDRAM2-3 is used to provide buffer space for all data received by FPGA circuit 2-1;
[0051] Configure chips 2-4 for storing configuration data;
[0052] EEPROM2-5 is used for storing configuration information of the CPCI bridge chip 2-2.
[0053] The FPGA circuit 2-1 completes the conversion of the data rate through the SDRAM 2-3, real...
specific Embodiment approach 3
[0058] Specific implementation mode three: combination image 3 Describe this embodiment, this embodiment is the further limitation of the rotary strapdown system hardware platform based on CPCI bus described in specific embodiment two,
[0059] The FPGA circuit 2-1 is embedded with an internal signal source detection point 2-1-1, a signal receiver, a dual-port RAM 2-1-3, a FIFO buffer module 2-1-6, a data control module 2-1-5, SDRAM controller 2-1-4, CPCI controller 2-1-10, rotating mechanism signal control module 2-1-9, combined navigation information interface module 2-1-8 and PLL module 2-1-7;
[0060] Internal signal source detection point 2-1-1, used to provide test signal output for external equipment;
[0061] The signal receiver is used to receive three-way gyroscope signals and three-way accelerometer signals;
[0062] Dual-port RAM2-1-3, used to convert the 8-bit data width of the received three-way gyro signal and three-way accelerometer signal into a 32-bit data...
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