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Generation system of test case flow information in chip verification and application

An information generation and test case technology, applied in the direction of creating/generating source code, special data processing applications, program files, etc., can solve problems such as confusion of test cases, increase of verification workload, errors in process documents, etc., to improve smoothness and efficiency. Efficiency, improve drawing efficiency and reliability, and reduce the effect of verification workload

Pending Publication Date: 2021-11-02
MOLCHIP TECH (SHANGHAI) CO LTD
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  • Abstract
  • Description
  • Claims
  • Application Information

AI Technical Summary

Problems solved by technology

However, when current chip verification engineers and software design engineers draw the flow chart documents of the logic modules of the test cases, they often need to go through the process of the previous test cases again, which not only increases the verification workload, but also easily causes confusion in the test cases. , resulting in an error in the drawn process document

Method used

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  • Generation system of test case flow information in chip verification and application
  • Generation system of test case flow information in chip verification and application
  • Generation system of test case flow information in chip verification and application

Examples

Experimental program
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Embodiment

[0044] see figure 1 Shown is a system for generating test case process information in chip verification provided by the present invention.

[0045] The system includes a verification personnel client, a software personnel client and a process information generation device.

[0046] Described verifier client, is used for collecting the process identifier information that verifier is set for EDA emulation test case, in the EDA emulation code corresponding to aforementioned EDA emulation test case, add the flow identifier information of aforementioned setting with the mode of adding annotation; And when the above-mentioned EDA simulation test case is finished running, the above-mentioned EDA simulation code information provided with the process identifier information is obtained and sent to the process information generating device.

[0047] The software personnel client is used to collect the process identifier information set by the software personnel for the software test cas...

test example ）

[0054] The flow chart analysis unit is configured to analyze the code type information, code operation instruction sequence information and process identifier information contained in the obtained flow chart document. The code type includes EDA simulation code type (corresponding to EDA simulation test case) and C code type (corresponding to software test case). The operation instruction sequence information of the code is the code content in the flowchart (the flowchart document is generated by code). The process identifier includes frame object information, frame annotation information, and the correspondence between the aforementioned frame objects, frame annotations, and operation instructions in the flow chart.

[0055] The code converting unit is configured to convert the code in the aforementioned flowchart document into a code that matches the type of the aforementioned client based on the type of the client that obtains the flowchart document based on the information ...

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Abstract

The invention discloses a generation system of test case flow information in chip verification and application, and relates to the technical field of chip development. The system comprises a verification personnel client, which is used for adding a flow identifier into an EDA simulation code, obtaining EDA simulation code information provided with the flow identifier and sending the EDA simulation code information to a flow information generation device when the operation of an EDA simulation test case is completed; a software personnel client, which is used for adding the flow identifier into a C code, acquiring the C code provided with flow identifier information and then sending the C code to the flow information generation device when the software test case is operated; and a flow information generation device, which is used for receiving the EDA simulation code or the C code provided with the flow identifier information, generating a corresponding flow chart document and storing the flow chart document in a flow chart database. According to the invention, the flow chart drawing efficiency and reliability are improved, the verification workload is reduced, and meanwhile, the communication smoothness and efficiency of related personnel are improved.

Description

technical field [0001] The invention relates to the technical field of chip development, in particular to a generation system and application of test case process information in chip verification. Background technique [0002] In the process of chip development, chip verification (Verification) runs through the entire chip design process. From behavioral HDL design to chip tape-out, a large number of EDA (Eletronic Design Automation, electronic design automation) verifications are required. Among them, the test case (case test) is to write a series of codes to verify the function or performance of the test item. Take the UVM (Universal Verification Methodology) verification commonly used in chip design as an example. The test case is based on the system Verilog language, which generates incentives by using UVM sequence (UVM sequence). After obtaining the simulation results through the EDA simulation of the test case, it is necessary to use the debug (debugging) tool to loca...

Claims

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Application Information

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Patent Type & Authority Applications(China)
IPC IPC(8): G06F30/33G06F8/30G06F8/73
CPCG06F30/33G06F8/316G06F8/73
Inventor 袁力蔡浩胡扬央
Owner MOLCHIP TECH (SHANGHAI) CO LTD
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