Looking for breakthrough ideas for innovation challenges? Try Patsnap Eureka!

FPGA configuration file update device

A configuration file and microprocessor technology, applied in the field of digital systems, can solve the problems of increasing the normal working time of the system, not being able to meet the convenience and speed of online configuration at the same time, and increasing the burden on the microprocessor/microcontroller, so as to achieve online configuration Effect

Inactive Publication Date: 2014-02-05
UNIV OF ELECTRONICS SCI & TECH OF CHINA
View PDF3 Cites 0 Cited by
  • Summary
  • Abstract
  • Description
  • Claims
  • Application Information

AI Technical Summary

Problems solved by technology

However, the disadvantage of this method is that every time it is powered on, it needs to be controlled by the microprocessor / microcontroller, which not only increases the burden on the microprocessor / microcontroller, but also has to wait for the microprocessor to wait for the power-on FPGA chip every time it is powered on. / The microcontroller can only be configured after the initialization is completed, which increases the waiting time for the FPGA chip to be configured, that is, increases the time from power-on to normal operation of the entire system
At the same time, the impact of the second method on maintenance cost, cycle and difficulty still exists in this method
[0009] The above three commonly used configuration methods have their own advantages and characteristics, and are suitable for different occasions. However, due to their own limitations, they cannot meet the needs of online configuration, getting rid of the constraints of download lines, and being convenient and fast at the same time.

Method used

the structure of the environmentally friendly knitted fabric provided by the present invention; figure 2 Flow chart of the yarn wrapping machine for environmentally friendly knitted fabrics and storage devices; image 3 Is the parameter map of the yarn covering machine
View more

Image

Smart Image Click on the blue labels to locate them in the text.
Viewing Examples
Smart Image
  • FPGA configuration file update device
  • FPGA configuration file update device
  • FPGA configuration file update device

Examples

Experimental program
Comparison scheme
Effect test

Embodiment Construction

[0020] The specific embodiments of the present invention are described below in conjunction with the accompanying drawings, so that those skilled in the art can better understand the present invention. It should be particularly reminded that in the following description, when the detailed description of known functions and designs may dilute the main content of the present invention, these descriptions will be omitted here.

[0021] figure 1 It is a schematic diagram of a specific implementation of the FPGA configuration file update device of the present invention.

[0022] In this embodiment, as figure 1 As shown, the external memory stores FPGA configuration files for the microprocessor / The microcontroller reads. Considering the ease of use and versatility of the operation of updating the FPGA configuration file, the external memory uses a removable disk, which is a U disk in this embodiment 1 , The removable disk has a USB interface, which is versatile, simple and plug and play...

the structure of the environmentally friendly knitted fabric provided by the present invention; figure 2 Flow chart of the yarn wrapping machine for environmentally friendly knitted fabrics and storage devices; image 3 Is the parameter map of the yarn covering machine
Login to View More

PUM

No PUM Login to View More

Abstract

The invention discloses a field-programmable gate array (FPGA) configuration file update device. A microprocessor / microcontroller imports an FPGA configuration file from an external memory through a universal plug and play interface, and transmits the FPGA configuration file to an FPGA chip; the FPGA chip converts the FPGA configuration file into a data format capable of being identified by a nonvolatile memory, transmits the converted FPGA configuration file to the nonvolatile memory for storage, and updates the FPGA configuration file; and after a digital system is electrified again, the FPGA chip automatically reads the updated configuration file stored in the nonvolatile memory to realize automatic loading and normal operation. In the device, only when the FPGA configuration file needs to be updated, a new FPGA configuration file is written into the nonvolatile memory so as to realize the requirement of online configuration; and meanwhile, the microprocessor / microcontroller provides the interface for the external memory and reads the FPGA configuration file into the personal memory, and then the FPGA configuration file is written into the nonvolatile memory so as to realize the update of the FPGA configuration file and avoid the limitation of a special downloading line.

Description

technical field [0001] The invention belongs to the technical field of digital systems, and more specifically relates to a device for updating FPGA chip configuration files in a digital system to realize different circuit functions of the digital system. Background technique [0002] A digital system is an electronic system that stores, transmits, and processes digital information. In recent years, it has been widely used in various fields of science and technology such as television, radar, communications, electronic computers, automatic control, and aerospace. The digital system is based on binary and has the characteristics of simple implementation and high reliability; it also has the ability of mathematical operations and logical operations, and is extremely suitable for applications such as calculation, comparison, storage, transmission, control, and decision-making; high integration and small size , low power consumption, strong anti-interference ability, easy to real...

Claims

the structure of the environmentally friendly knitted fabric provided by the present invention; figure 2 Flow chart of the yarn wrapping machine for environmentally friendly knitted fabrics and storage devices; image 3 Is the parameter map of the yarn covering machine
Login to View More

Application Information

Patent Timeline
no application Login to View More
Patent Type & Authority Patents(China)
IPC IPC(8): G06F9/445
Inventor 向川云曾浩叶芃张沁川崔东岳
Owner UNIV OF ELECTRONICS SCI & TECH OF CHINA
Who we serve
  • R&D Engineer
  • R&D Manager
  • IP Professional
Why Patsnap Eureka
  • Industry Leading Data Capabilities
  • Powerful AI technology
  • Patent DNA Extraction
Social media
Patsnap Eureka Blog
Learn More
PatSnap group products