Signal injection system for hardware-in-loop testing

Abstract

The invention discloses a signal injection system for hardware-in-loop testing, which has the design concept that two sections of parallel communication networks are constructed through two channels of a bus board card, and a virtual gateway with a data path switching mechanism is established between the two sections of parallel communication networks to realize injection of a self-defined signal; moreover, the communication relationship between the real controller node and the first channel or bus is realized through a hardware switch, so that the multi-node signal injection operation is realized. According to the invention, full coverage of multi-node hardware-in-loop test signal injection is realized, and meanwhile, the tested node receives messages of other nodes in the network through the parallel network, so that the conditions of false alarm codes and the like are avoided.

Description

technical field [0001] The invention relates to the field of hardware-in-the-loop testing, in particular to a signal injection system for hardware-in-the-loop testing. Background technique [0002] Hardware-in-the-loop testing has become an important part of the vehicle controller development model. At present, many host manufacturers have shifted from hardware-in-the-loop testing of a single controller to integrated HIL testing of multiple controllers. Integrated HIL testing can be performed simultaneously on multiple nodes. In the case of , test and verify the interaction between subsystems. [0003] When the real controller node is online, if it is necessary to implement fault injection such as effective bits, error values, logic errors, etc. of the signal, the conventional method is to indirectly implement controller error signal injection by injecting related device faults. Due to the fact that some signal failure logics are not clear or the components involved are not...

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Problems solved by technology

[0003] When the real controller node is online, if it is necessary to implement fault injection such as effective bits, error values, logic errors, etc. of the signal, the conventional method is to indirectly implement controller error signal injection by injecting related device faults. Due to the fact that some signal failure logics are not clear or the components involved are not open to customize relevant fault information, etc., this existing method cannot fully cover the injection test of all valid bits, error values ​​and other signals sent by the controller. , that is, the existing multi-node integrated hardware-in-the-loop test method, it is difficult to change the CAN message sent by the real controller node to achieve fault injection

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